Introduction

This document provides an overview and getting‑started guidance for the LAN9645xF and LAN9645xS Gigabit Ethernet switch families, enabling customers to quickly begin system evaluation and design.

The LAN9645x family consists of compact, cost‑effective 5‑, 7‑, and 9‑port Gigabit Ethernet switches with integrated 10/100/1000BASE‑T PHYs, designed for industrial and embedded networking applications requiring flexible connectivity and scalable feature sets.

A key advantage of the LAN9645x architecture is its ability to support a wide range of system designs—from simple, low-cost unmanaged switches to fully managed, Linux-based industrial Ethernet systems—using a single device platform.

The device family supports two primary modes of operation:

  • Unmanaged operation, using pin strapping or external EEPROM for static configuration, enabling standalone switch functionality without a host processor
  • Managed operation, using an external host processor connected to a Network Processor Interface (NPI) switch port, and controlled through Linux® Distributed Switch Architecture (DSA) over SPI management interface

In managed configurations, LAN9645x integrates into the Linux networking stack, enabling dynamic configuration, monitoring, and advanced feature control.

The LAN9645x family is offered in two primary variants:

  • LAN9645xS (Standard) – Provides baseline Layer 2 switching capabilities for cost-sensitive and simpler designs, supporting both unmanaged and limited managed configurations
  • LAN9645xF (Full Feature) – Extends the feature set to include Time-Sensitive Networking (TSN), Audio Video Bridging (AVB), and industrial redundancy protocols such as HSR, PRP, and MRP, enabling deterministic and high-availability networking applications, only supported in managed configurations
Figure . LAN96459/7/5 Block Diagram
Note: Advanced features such as TSN scheduling, redundancy protocols, and dynamic traffic management require a managed system architecture, including an external host processor running Linux DSA.

Both S and F variants are offered in 128-pin TQFP or 156-pin VQFN-DR packaging, providing additional extended GPIO (eGPIO) pins supporting alternate functions.

This scalable architecture allows designers to utilize the same LAN9645x device platform across both unmanaged and managed system designs. By supporting a broad range of operating models and feature sets, the family helps reduce development effort and enables platform reuse across multiple applications.

Ensure to review the latest product errata and design collateral available on the LAN9645x product pages, also provided in Documentation.