17.8.10 APBD Mask
Note: This register is only available for SAMC2x "N" series devices.
| Name: | APBDMASK |
| Offset: | 0x20 |
| Reset: | 0x00000000 |
| Property: | PAC Write-Protection |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| Access | |||||||||
| Reset |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| Access | |||||||||
| Reset |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| TC7 | TC6 | TC5 | SERCOM7 | SERCOM6 | |||||
| Access | R/W | R/W | R/W | R/W | R/W | ||||
| Reset | 0 | 0 | 0 | 0 | 0 |
Bit 4 – TC7 TC7 APBD Mask Clock Enable
| Value | Description |
|---|---|
| 0 | The APBD clock for the TC7 is stopped. |
| 1 | The APBD clock for the TC7 is enabled. |
Bit 3 – TC6 TC6 APBD Mask Clock Enable
| Value | Description |
|---|---|
| 0 | The APBD clock for the TC6 is stopped. |
| 1 | The APBD clock for the TC6 is enabled. |
Bit 2 – TC5 TC5 APBd Mask Clock Enable
| Value | Description |
|---|---|
| 0 | The APBD clock for the TC5 is stopped. |
| 1 | The APBD clock for the TC5 is enabled. |
Bit 1 – SERCOM7 SERCOM7 APBD Mask Clock Enable
| Value | Description |
|---|---|
| 0 | The APBD clock for the SERCOM7 is stopped. |
| 1 | The APBD clock for the SERCOM7 is enabled. |
Bit 0 – SERCOM6 SERCOM6 APBD Mask Clock Enable
| Value | Description |
|---|---|
| 0 | The APBD clock for the SERCOM6 is stopped. |
| 1 | The APBD clock for the SERCOM6 is enabled. |