27.8.11 Page Buffer Load Data 1
| Name: | PBLDATA1 |
| Offset: | 0x2C |
| Reset: | 0xFFFFFFFF |
| Property: | - |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| PBLDATA[31:24] | |||||||||
| Access | R | R | R | R | R | R | R | R | |
| Reset | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| PBLDATA[23:16] | |||||||||
| Access | R | R | R | R | R | R | R | R | |
| Reset | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| PBLDATA[15:8] | |||||||||
| Access | R | R | R | R | R | R | R | R | |
| Reset | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| PBLDATA[7:0] | |||||||||
| Access | R | R | R | R | R | R | R | R | |
| Reset | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | |
Bits 31:0 – PBLDATA[31:0] Page Buffer Load Data (Bits 63:32])
The PBLDATA register is a holding register for partial AHB writes to the same 64-bit page buffer section. Page buffer loads are performed on a 64-bit basis.
This is a read only register.