27.8.8 Address

Name: ADDR
Offset: 0x1C
Reset: 0x00000000
Property: PAC Write-Protection

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
   ADDR[21:16] 
Access R/WR/WR/WR/WR/WR/W 
Reset 000000 
Bit 15141312111098 
 ADDR[15:8] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 
Bit 76543210 
 ADDR[7:0] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 

Bits 21:0 – ADDR[21:0] NVM Address

ADDR drives the hardware half-word offset from the start address of the corresponding NVM section when a command is executed using CMDEX. This register is also automatically updated when writing to the page buffer. The effective address for the operation is Start address of the section + 2*ADDR.

Example:

For erasing the 3rd row in the Flash memory, spanning from 0x00000200 to 0x000002FF, ADDR must be written with the half-word offset address of any half-word within this range, that is any value between 0x100 and 0x17F.