21.8.5 RTC Clock Selection Control
Name: | RTCCTRL |
Offset: | 0x10 |
Reset: | 0x00000000 |
Property: | PAC Write-Protection |
Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
Access | |||||||||
Reset |
Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
Access | |||||||||
Reset |
Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
Access | |||||||||
Reset |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
RTCSEL[2:0] | |||||||||
Access | R/W | R/W | R/W | ||||||
Reset | 0 | 0 | 0 |
Bits 2:0 – RTCSEL[2:0] RTC Clock Source Selection
Value | Name | Description |
---|---|---|
0x0 | ULP1K | 1.024 kHz from 32.768 kHz internal ULP oscillator |
0x1 | ULP32K | 32.768 kHz from 32.768 kHz internal ULP oscillator |
0x2 | OSC1K | 1.024 kHz from 32.768 kHz internal oscillator |
0x3 | OSC32K | 32.768 kHz from 32.768 kHz internal oscillator |
0x4 | XOSC1K | 1.024 kHz from 32.768 kHz external oscillator |
0x5 | XOSC32K | 32.768 kHz from 32.768 kHz external crystal oscillator |
0x6 | Reserved | |
0x7 | Reserved |