41.8.10 Synchronization Busy

Name: SYNCBUSY
Offset: 0x10
Reset: 0x00000000
Property: -

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
          
Access  
Reset  
Bit 15141312111098 
          
Access  
Reset  
Bit 76543210 
     DATABUFDATAENABLESWRST 
Access RRRR 
Reset 0000 

Bit 3 – DATABUF Data Buffer

This bit is set when DATABUF register is written.

This bit is cleared when DATABUF synchronization is completed.

ValueDescription
0 No ongoing synchronized access.
1 Synchronized access is ongoing.

Bit 2 – DATA Data

This bit is set when DATA register is written.

This bit is cleared when DATA synchronization is completed.

ValueDescription
0 No ongoing synchronized access.
1 Synchronized access is ongoing.

Bit 1 – ENABLE DAC Enable Status

This bit is set when CTRLA.ENABLE bit is written.

This bit is cleared when CTRLA.ENABLE synchronization is completed.

ValueDescription
0 No ongoing synchronization.
1 Synchronization is ongoing.

Bit 0 – SWRST Software Reset

This bit is set when CTRLA.SWRST bit is written.

This bit is cleared when CTRLA.SWRST synchronization is completed.

ValueDescription
0 No ongoing synchronization.
1 Synchronization is ongoing.