14.8.2 Status
| Name: | STATUS |
| Offset: | 0x04 |
| Reset: | 0x00 |
| Property: | - |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| DBZ | BUSY | ||||||||
| Access | R/W | R/W | |||||||
| Reset | 0 | 0 |
Bit 1 – DBZ Disable-By-Zero
Writing a zero to this bit has no effect.
Writing a one to this bit clears DBZ to zero.
| Value | Description |
|---|---|
| 0 | A divide-by-zero fault has not occurred |
| 1 | A divide-by-zero fault has occurred |
Bit 0 – BUSY DIVAS Accelerator Busy
This bit is set when a value is written to the DIVISOR14.8.4 Divisor or SQRNUM14.8.7 Square Root Input registers.
This bit is cleared when either division or square root function completes and results are ready in the RESULT14.8.5 Result and REMAINDER14.8.6 Remainder registers.
| Value | Description |
|---|---|
| 0 | DIVAS is idle |
| 1 | DIVAS is busy with an ongoing division |