53.8.3 20-pin IDC JTAG Connector
For debuggers and programmers that support the 20-pin IDC JTAG Connector, that is, the SAM-ICE, the signals must be connected as shown in the following figure with details described in the table.
| Header Signal Name | Description |
|---|---|
| SWDCLK | Serial wire clock pin |
| SWDIO | Serial wire bidirectional data pin |
| RESET | Target device reset pin, active low |
| VCC | Target voltage sense, should be connected to the device VDD |
| GND | Ground |
| GND* | These pins are reserved for firmware extension purposes. They can be left unconnected or connected to GND in normal debug environment. They are not essential for SWD in general. |
Note: JTAG and Serial Wire Interface recommendations can be found in the
“Basic 32-Bit MCU Design and Troubleshooting Checklist” guide on the Microchip web site,
www.microchip.com.