14.4.2 Operation

In Active mode, all clock domains and power domains are active, allowing both software execution and peripheral operation. The PM saves power by controlling different sleep modes based on application requirements. Refer to the Sleep Mode Operation section for more details on the Idle and Standby sleep modes.

In both Active mode or any sleep mode, if an AHB/APB clock is masked in MCLK.AHBMASK or MCLK.APBxMASK registers, the clock is gated at the output of the Main Clock (MCLK) and not provided to the corresponding peripheral, regardless of whether the peripheral requests it.

The Supply Controller (SUPC) allows power consumption in the Standby sleep mode to be further reduced.