27.2 Overview

The I/O Pin Controller (PORT) controls the I/O pins of the device. The I/O pins are organized into groups with up to 32 pins, collectively referred to as PORT groups. The pins of a PORT group can be configured and controlled individually or as a group. The number of PORT groups on a device may depend on the package and the number of pins. Each pin may be used either for General-Purpose Input/Output (GPIO) under direct application control or be assigned to an embedded device peripheral. When used for GPIO, each pin can be configured as input or output, with highly configurable driver and pull settings.

PORT groups are labeled using letters of the alphabet, starting with 'A', followed by 'B', 'C', and so on. Within each group, the pins are numbered starting from zero. Each pin is identified by combining the group letter with its zero-based index number. For example, the first pin in group A is named PA0, and the fourth pin in group B is named PB3.

All I/O pins have true Read-Modify-Write (RMW) functionality when used for GPIO. The direction or the output value of one or more pins may be changed (set, reset or toggled) explicitly without unintentionally changing the state of any other pins in the same port group, by a single atomic 8-, 16-, or 32-bit write.

The PORT is connected to the high-speed bus matrix through an AHB/APB bridge. A selection of registers can also be accessed using the low-latency ARM® single-cycle I/O port (IOBUS).