7.1.2 User Configuration

At start-up and after a Reset, the bit field values of this register are determined either by the Default value given here or by the corresponding BOOTCFG fuse. Refer to the BOOTCFG - Boot Configuration Fuses section for details.

Name: USERCFG
Offset: 0x0084
Reset: 0x00000000
Property: R

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
          
Access  
Reset  
Bit 15141312111098 
      SUT[2:0] 
Access RRR 
Reset 000 
Bit 76543210 
 CRCBOOTCRCSEL       
Access RR 
Reset 00 

Bits 10:8 – SUT[2:0] Start-up Time

These bits select the start-up time between power-on and code execution.

ValueNameDescription
0x0 0MS 0 ms
0x1 1MS 1 ms
0x2 2MS 2 ms
0x3 4MS 4 ms
0x4 8MS 8 ms
0x5 16MS 16 ms
0x6 32MS 32 ms
0x7 64MS 64 ms

Bit 7 – CRCBOOT CRC Boot

This bit enables a Cyclic Redundancy Check (CRC) of the BOOT section at start-up.
ValueNameDescription
0 DISABLE No CRC
1 ENABLE CRC of the Boot section

Bit 6 – CRCSEL CRC Polynomial Selection

This bit is used to select which polynomial type for Cyclic Redundancy Checks.
ValueNameDescription
0 CRC16 CRC-16-CCITT
1 CRC32 CRC-32 (IEEE 802.3)