22.5.3 Clocks

The TC bus clock (CLK_TCn_APB) can be enabled or disabled in the Main Clock. The default state of CLK_TCn_APB is described in the Peripheral Clock Masking section of the MCLK – Main Clock chapter.

A generic clock (GCLK_TCn) is required to clock the TC. This clock must be configured and enabled in the generic clock controller before using the TC. Refer to the GCLK – Generic Clock Controller chapter for details.

Note: The TC instances that can be configured for 32-bit operation mode share a peripheral clock channel. These two instances cannot be set to different clock frequencies, regardless of which operation mode they use.

These generic clocks are asynchronous to the user interface clock (CLK_TCn_APB). Because of this asynchronicity, writes to certain registers require synchronization between the clock domains.