1.2.3 Parasitic Power Boost Circuitry

The parasitic power boost circuitry is optional circuitry used to provide additional current to a device when executing a command. It works for both the SWI and the SWI-PWM modes. This circuitry is only required when the current demands of the command exceed the power capability of the I/O driving the SWI. By default, the Enable Parasitic Power (EPP#) pin will default HIGH disabling this circuitry. This circuitry is not needed when sending a command or receiving a response from the crypto device. It is only needed during the execution phase of a command.

Figure 1-5. Parasitic Power Boost Circuitry

Proper Circuitry Usage

  1. The EPP# signal must be initially asserted HIGH.
  2. Issue a cryptography command.
  3. Assert the EPP# signal LOW for the duration of the command.
  4. Assert the EPP# signal HIGH.
  5. Read back the command response.
Restriction: The software required to implement this feature is left up to the developer. It is not built into the current kit protocol firmware.