11.2.1 Start Configuration
The following peripherals need to be configured for realizing the three-phase phase sequence detection demo:
- Timer/Counter Type A (TCA0)
- Timer/Counter Type A (TCA1)
- USART 1
- SPI 0
- ZDC 0
- ZCD 1
- ADC 0
- Timer 0:
Timer 0 is configured with the system clock divided by 8 frequency and it is used for schedule time for executing the phase sequence detector application functionalities. Figure 10-2 shows the START TIMER 0 configuration window.
Figure 11-2. Atmel START Timer 0 Configuration Window - Timer 1:
Timer 1 is configured with the system clock divided by 8 frequency and it is used for calculating the phase shift between the two signals out of the three-phase input. Figure 10-3 shows the START TIMER 1.2 configuration window.
Figure 11-3. Atmel START Timer 1 Configuration Window - USART 1:
USART is configured with a 230400 baud rate, interrupt enabled, and it is used for communication between the application and Data Visualizer Graphical tool (PC tool). Figure 10-4 shows the START USART configuration window.
Figure 11-4. Atmel START USART Configuration Window - SPI 0:
SPI is configured with a 6 Mhz speed, in mode 2 and it is used for interface signal emulator modules. Figure 10-5 shows the START SPI configuration window.
Figure 11-5. Atmel START SPI Configuration Window - ZCD 0:
ZCD 0 is configured with the rising edge detection interrupt enable and it is used for detecting the phase of the three-phase signal. Figure 10-6 shows the START ZCD 0 configuration window.
Figure 11-6. Atmel START ZCD 0 Configuration Window - ZCD 1:
ZCD 1 is configured with the rising edge detection interrupt enable and it is used for detecting the phase of the three-phase signal. Figure 10-7 shows the START ZCD 1 configuration window.
Figure 11-7. Atmel START ZCD 1 Configuration Window - ADC 0:
ADC 0 is configured with the Differential mode enabled in Polling mode and it is used for measuring the three-phase signal to reproduce the signal on the data visualizer, calculating the RMS voltage and the single phasing detection. Figure 10-8 shows the START ADC 0 configuration window.
Figure 11-8. Atmel START ADC 0 Configuration Window - ZCD 2:ZCD 2 is configured with the rising edge detection interrupt enable and it is used for detecting the phase of the three-phase signal (ZCD 2 peripheral is available only in 64 pin AVR DA family MCUs). Figure 10-9 shows the START ZCD 2 configuration window.
Figure 11-9. Atmel START ZCD 2 Configuration Window (AVR128DA64) - VREF:
VREF is always configured with the enable reference voltage (VDD) for ADC and it is used for ADC peripheral as a reference voltage. Figure 10-10 shows the START VREF configuration window.
Figure 11-10. Atmel START VREF Configuration Window