44.6.5 OPAxCON4

Important:
  1. The OFCST bit is only accessible to the user when the OPA module is in automatic input offset voltage calibration mode (OFCSEL = ‘b10).
  2. It is recommended to perform the calibration sequence at least once after selecting the automatic input offset voltage calibration result as the OPA offset source (OFCSEL = ‘b10).
Operational Amplifier Control Register 3
Name: OPAxCON4
Address: 0x123,0x12B

Bit 76543210 
    PTRES OFCSTOFCSEL[1:0] 
Access R/WR/HCR/WR/W 
Reset 0000 

Bit 4 – PTRES Peak/Trough Detect Reset

ValueDescription
1 Initiate peak/trough detect Reset
0 No Reset of peak/trough detect is initiated

Bit 2 – OFCST  Automatic Input Offset Voltage Calibration Start(1,2)

ValueDescription
1 Automatic input offset voltage calibration is started or in progress
0 Automatic input offset voltage calibration is complete or not in progress

Bits 1:0 – OFCSEL[1:0] Input Offset Voltage Source Selection

ValueDescription
11 Reserved
10 Result of automatic input offset voltage calibration sequence is used as input offset voltage source
01 Value written to the OPAxOFFSET register is used as input offset voltage source
00 Factory calibrated input offset voltage value in the OPAxOFFSET register is used as input offset voltage source
The OFCST Automatic Input Offset Voltage Calibration Start(1,2) bit is only accessible to the user when the OPA module is in automatic input offset voltage calibration mode (OFCSELInput Offset Voltage Source Selection = ‘b10). It is recommended to perform the calibration sequence at least once after selecting the automatic input offset voltage calibration result as the OPA offset source (OFCSELInput Offset Voltage Source Selection = ‘b10).