2 Configuring the CLC Peripheral

Operation of the peripheral is controlled by the following registers:
  • CLCSELECT: used to configure the overlay and select which CLC is being configured.
  • CLCnCON: used to enable the module and select which logic mode is being used.
  • CLCnPOL: used to control the logic polarity of the cell output and intermediate variables.
  • CLCnSELx: used to select the inputs using the register’s LCxDxS<5:0> bits. There are four data select registers.
  • CLCnGLSx: used to form one of the four inputs to the logic function stages from an OR or AND of the data bus signals derived from the data selection stage. Either the direct or inverted data values can be selected for each data signal.

CLC 1 Setup Code Snippetis a code snippet demonstrating ANDing two input signals using CLC3.

CLC 1 Setup Code Snippet

//CLC 1 Setup
CLCSELECT = 0x02;//Configure overlay to point to CLC3 (n+1)
CLCnPOL = 0x00;//Output of the logic cell is not inverted
CLCnSEL0 = 0x06;//Input Data selection 0(varies by device)
CLCnSEL1 = 0x0C;//Input Data selection 1(varies by device)
CLCnSEL2 = 0x04;//Input Data selection 2(varies by device)
CLCnSEL3 = 0x06;//Input Data selection 3(varies by device)
CLCnGLS0 = 0x02;//Input 1 is not inverted
CLCnGLS1 = 0x20;//Input 1 is not inverted
CLCnGLS2 = 0xAA;//Input 1 is not inverted
CLCnGLS3 = 0x80;//Input 1 is not inverted
CLCnCON = 0x80;//CLC enabled, mode is AND-OR