4.2.6 Special Considerations

ERASE Pin

Some SAM devices include an ERASE pin which is asserted to perform a complete chip erase and unlock devices on which the security bit is set. This feature is coupled to the device itself as well as the Flash controller and is not part of the ARM core.

The ERASE pin is NOT part of any debug header, and the Power Debugger is thus unable to assert this signal to unlock a device. In such cases the user should perform the erase manually before starting a debug session.

Physical Interfaces

JTAG Interface

The RESET line should always be connected so that the Power Debugger can enable the JTAG interface.

SWD Interface

The RESET line should always be connected so that the Power Debugger can enable the SWD interface.