18.2.8 Pin Change Mask Register 0

Name: PCMSK0
Offset: 0x6B
Reset: 0x00
Property: -

Bit 76543210 
 PCINT 7PCINT 6PCINT 5PCINT 4PCINT 3PCINT 2PCINT 1PCINT 0 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 

Bits 0, 1, 2, 3, 4, 5, 6, 7 – PCINT  Pin Change Enable Mask

Each PCINT[7:0] bit selects whether pin change interrupt is enabled on the corresponding I/O pin. If PCINT[7:0] is set and the PCIE0 bit in PCICR is set, pin change interrupt is enabled on the corresponding I/O pin. If PCINT[7:0] is cleared, pin change interrupt on the corresponding I/O pin is disabled.