28.3.4 Digital Input Disable Register 1

Name: DIDR1
Offset: 0x7F
Reset: 0x00
Property: -

Bit 76543210 
       AIN1DAIN0D 
Access R/WR/W 
Reset 00 

Bit 1 – AIN1D AIN1 Digital Input Disable

When this bit is written logic one, the digital input buffer on the AINP1/0 pin is disabled. The corresponding PIN Register bit will always read as zero when this bit is set. When an analog signal is applied to the AINP1/0 pin and the digital input from this pin is not needed, this bit should be written logic one to reduce power consumption in the digital input buffer.

Bit 0 – AIN0D AIN0 Digital Input Disable

When this bit is written logic one, the digital input buffer on the AINP1/0 pin is disabled. The corresponding PIN Register bit will always read as zero when this bit is set. When an analog signal is applied to the AINP1/0 pin and the digital input from this pin is not needed, this bit should be written logic one to reduce power consumption in the digital input buffer.