4.2.1 Xplained Pro Extension Headers

The SAMC21N Xplained Pro headers EXT1, EXT2, and EXT3 offers access to the I/O of the microcontroller in order to expand the board e.g. by connecting extensions to the board. These headers are based on the standard extension header specified in Xplained Pro Standard Extension Header. The headers have a pitch of 2.54mm.

Table 4-1. Extension Header EXT1
Pin on EXT1SAMC21N pinFunctionShared functionality
1 [ID]--Communication line to the ID chip on an extension board.
2 [GND]--Ground.
3 [ADC(+)]PB09ADC0_AIN3 or SDADC_INP[1] or Y[15]Shield
4 [ADC(-)]PB08ADC0_AIN2 or SDADC_INN[1] or Y[14]Shield
5 [GPIO1]PA10SERCOM2 PAD[2] UART RTS or X[2]/Y[18]-
6 [GPIO2]PA11SERCOM2 PAD[3] UART CTS or X[3]/Y[19]-
7 [PWM(+)]PB12TC4/WO[0] or X[12]/Y[28] EDBG GPIO0
8 [PWM(-)]PB13TC4/WO[1] or X[13]/Y[29]-
9 [IRQ/GPIO]PA22IRQ6 or TC4/WO[0] or TCC1/WO[0] or X[10]/Y[26]EDBG GPIO1
10 [SPI_SS_B/GPIO]PA23GPIO or TC4/WO[1] or TCC1/WO[1] or X[11]/Y[27]-
11 [TWI_SDA]PB16SERCOM5 PAD[0] I2C SDA-
12 [TWI_SCL]PB17SERCOM5 PAD[1] I2C SCL-
13 [USART_RX]PA13SERCOM2 PAD[1] UART RX-
14 [USART_TX]PA12SERCOM2 PAD[0] UART TX-
15 [SPI_SS_A]PC28SERCOM1 PAD[1] SPI SS-
16 [SPI_MOSI]PA18SERCOM1 PAD[2] SPI MOSI or X[6]/Y[22]-
17 [SPI_MISO]PC27SERCOM1 PAD[0] SPI MISO-
18 [SPI_SCK]PA19SERCOM1 PAD[3] SPI SCK or X[7]/Y[23]-
19 [GND]--Ground.
20 [VCC]--Power for extension board.
Table 4-2. Extension Header EXT2
Pin on EXT2SAMC21N pinFunctionShared functionality
1 [ID]--Communication line to the ID chip on an extension board.
2 [GND]--Ground.
3 [ADC(+)]PA08ADC1_AIN[10] or X[0]/Y[16]-
4 [ADC(-)]PA09ADC1_AIN[11] or X[1]/Y[17]-
5 [GPIO1]PA20SERCOM3 PAD[2] UART RTS or X[8]/Y[24]-
6 [GPIO2]PA21SERCOM3 PAD[3] UART CTS or X[9]/Y[25]-
7 [PWM(+)]PB30TC0/WO[0]Shield
8 [PWM(-)]PB31TC0/WO[1]Shield
9 [IRQ/GPIO]PC24IRQ0/GPIOEDBG GPIO2
10 [SPI_SS_B/GPIO]PC25GPIO-
11 [TWI_SDA]PA16SERCOM1 PAD[0] I2C SDAEXT3, Shield, EDBG I2C and Crypto Device
12 [TWI_SCL]PA17SERCOM1 PAD[1] I2C SCLEXT3, Shield, EDBG I2C and Crypto Device
13 [USART_RX]PB21SERCOM3 PAD[1] UART RX-
14 [USART_TX]PB20SERCOM3 PAD[0] UART TX-
15 [SPI_SS_A]PB03SERCOM5 PAD[1] SPI SS or Y[9]-
16 [SPI_MOSI]PB00SERCOM5 PAD[2] SPI MOSI or Y[6]-
17 [SPI_MISO]PB02SERCOM5 PAD[0] SPI MISO or Y[8]-
18 [SPI_SCK]PB01SERCOM5 PAD[3] SPI SCK or Y[7]-
19 [GND]--Ground.
20 [VCC]--Power for extension board.
Table 4-3. Extension Header EXT3
Pin on EXT3SAMC21N pinFunctionShared functionality
1 [ID]--Communication line to the ID chip on an extension board.
2 [GND]--Ground.
3 [ADC(+)]PB07ADC1_AIN[9] or SDADC_INP[2] or Y[13]-
4 [ADC(-)]PB06ADC1_AIN[8] or SDADC_INN[2] or Y[12]-
5 [GPIO1]PC18SERCOM6 PAD[2] UART RTS-
6 [GPIO2]PC19SERCOM6 PAD[3] UART CTS-
7 [PWM(+)]PB22TCC1/WO[2]-
8 [PWM(-)]PB23TCC1/WO[3]-
9 [IRQ/GPIO]PA28IRQ8/GPIOEDBG GPIO3
10 [SPI_SS_B/GPIO]PA27GPIO-
11 [TWI_SDA]PA16SERCOM1 PAD[0] I2C SDAEXT2, Shield, EDBG I2C and Crypto Device
12 [TWI_SCL]PA17SERCOM1 PAD[1] I2C SCLEXT2, Shield, EDBG I2C and Crypto Device
13 [USART_RX]PC17SERCOM6 PAD[1] UART RX-
14 [USART_TX]PC16SERCOM6 PAD[0] UART TX-
15 [SPI_SS_A]PC13SERCOM7 PAD[1] SPI SS-
16 [SPI_MOSI]PC14SERCOM7 PAD[2] SPI MOSIShield, Shield(2), and EDBG SPI
17 [SPI_MISO]PC12SERCOM7 PAD[0] SPI MISOShield, Shield(2), and EDBG SPI
18 [SPI_SCK]PC11SERCOM7 PAD[3] SPI SCKShield, Shield(2), and EDBG SPI
19 [GND]--Ground.
20 [VCC]--Power for extension board.