4.2.1 Xplained Pro Extension Headers
The SAMC21N Xplained Pro headers EXT1, EXT2, and EXT3 offers access to the I/O of the microcontroller in order to expand the board e.g. by connecting extensions to the board. These headers are based on the standard extension header specified in Xplained Pro Standard Extension Header. The headers have a pitch of 2.54mm.
Pin on EXT1 | SAMC21N pin | Function | Shared functionality |
---|---|---|---|
1 [ID] | - | - | Communication line to the ID chip on an extension board. |
2 [GND] | - | - | Ground. |
3 [ADC(+)] | PB09 | ADC0_AIN3 or SDADC_INP[1] or Y[15] | Shield |
4 [ADC(-)] | PB08 | ADC0_AIN2 or SDADC_INN[1] or Y[14] | Shield |
5 [GPIO1] | PA10 | SERCOM2 PAD[2] UART RTS or X[2]/Y[18] | - |
6 [GPIO2] | PA11 | SERCOM2 PAD[3] UART CTS or X[3]/Y[19] | - |
7 [PWM(+)] | PB12 | TC4/WO[0] or X[12]/Y[28] | EDBG GPIO0 |
8 [PWM(-)] | PB13 | TC4/WO[1] or X[13]/Y[29] | - |
9 [IRQ/GPIO] | PA22 | IRQ6 or TC4/WO[0] or TCC1/WO[0] or X[10]/Y[26] | EDBG GPIO1 |
10 [SPI_SS_B/GPIO] | PA23 | GPIO or TC4/WO[1] or TCC1/WO[1] or X[11]/Y[27] | - |
11 [TWI_SDA] | PB16 | SERCOM5 PAD[0] I2C SDA | - |
12 [TWI_SCL] | PB17 | SERCOM5 PAD[1] I2C SCL | - |
13 [USART_RX] | PA13 | SERCOM2 PAD[1] UART RX | - |
14 [USART_TX] | PA12 | SERCOM2 PAD[0] UART TX | - |
15 [SPI_SS_A] | PC28 | SERCOM1 PAD[1] SPI SS | - |
16 [SPI_MOSI] | PA18 | SERCOM1 PAD[2] SPI MOSI or X[6]/Y[22] | - |
17 [SPI_MISO] | PC27 | SERCOM1 PAD[0] SPI MISO | - |
18 [SPI_SCK] | PA19 | SERCOM1 PAD[3] SPI SCK or X[7]/Y[23] | - |
19 [GND] | - | - | Ground. |
20 [VCC] | - | - | Power for extension board. |
Pin on EXT2 | SAMC21N pin | Function | Shared functionality |
---|---|---|---|
1 [ID] | - | - | Communication line to the ID chip on an extension board. |
2 [GND] | - | - | Ground. |
3 [ADC(+)] | PA08 | ADC1_AIN[10] or X[0]/Y[16] | - |
4 [ADC(-)] | PA09 | ADC1_AIN[11] or X[1]/Y[17] | - |
5 [GPIO1] | PA20 | SERCOM3 PAD[2] UART RTS or X[8]/Y[24] | - |
6 [GPIO2] | PA21 | SERCOM3 PAD[3] UART CTS or X[9]/Y[25] | - |
7 [PWM(+)] | PB30 | TC0/WO[0] | Shield |
8 [PWM(-)] | PB31 | TC0/WO[1] | Shield |
9 [IRQ/GPIO] | PC24 | IRQ0/GPIO | EDBG GPIO2 |
10 [SPI_SS_B/GPIO] | PC25 | GPIO | - |
11 [TWI_SDA] | PA16 | SERCOM1 PAD[0] I2C SDA | EXT3, Shield, EDBG I2C and Crypto Device |
12 [TWI_SCL] | PA17 | SERCOM1 PAD[1] I2C SCL | EXT3, Shield, EDBG I2C and Crypto Device |
13 [USART_RX] | PB21 | SERCOM3 PAD[1] UART RX | - |
14 [USART_TX] | PB20 | SERCOM3 PAD[0] UART TX | - |
15 [SPI_SS_A] | PB03 | SERCOM5 PAD[1] SPI SS or Y[9] | - |
16 [SPI_MOSI] | PB00 | SERCOM5 PAD[2] SPI MOSI or Y[6] | - |
17 [SPI_MISO] | PB02 | SERCOM5 PAD[0] SPI MISO or Y[8] | - |
18 [SPI_SCK] | PB01 | SERCOM5 PAD[3] SPI SCK or Y[7] | - |
19 [GND] | - | - | Ground. |
20 [VCC] | - | - | Power for extension board. |
Pin on EXT3 | SAMC21N pin | Function | Shared functionality |
---|---|---|---|
1 [ID] | - | - | Communication line to the ID chip on an extension board. |
2 [GND] | - | - | Ground. |
3 [ADC(+)] | PB07 | ADC1_AIN[9] or SDADC_INP[2] or Y[13] | - |
4 [ADC(-)] | PB06 | ADC1_AIN[8] or SDADC_INN[2] or Y[12] | - |
5 [GPIO1] | PC18 | SERCOM6 PAD[2] UART RTS | - |
6 [GPIO2] | PC19 | SERCOM6 PAD[3] UART CTS | - |
7 [PWM(+)] | PB22 | TCC1/WO[2] | - |
8 [PWM(-)] | PB23 | TCC1/WO[3] | - |
9 [IRQ/GPIO] | PA28 | IRQ8/GPIO | EDBG GPIO3 |
10 [SPI_SS_B/GPIO] | PA27 | GPIO | - |
11 [TWI_SDA] | PA16 | SERCOM1 PAD[0] I2C SDA | EXT2, Shield, EDBG I2C and Crypto Device |
12 [TWI_SCL] | PA17 | SERCOM1 PAD[1] I2C SCL | EXT2, Shield, EDBG I2C and Crypto Device |
13 [USART_RX] | PC17 | SERCOM6 PAD[1] UART RX | - |
14 [USART_TX] | PC16 | SERCOM6 PAD[0] UART TX | - |
15 [SPI_SS_A] | PC13 | SERCOM7 PAD[1] SPI SS | - |
16 [SPI_MOSI] | PC14 | SERCOM7 PAD[2] SPI MOSI | Shield, Shield(2), and EDBG SPI |
17 [SPI_MISO] | PC12 | SERCOM7 PAD[0] SPI MISO | Shield, Shield(2), and EDBG SPI |
18 [SPI_SCK] | PC11 | SERCOM7 PAD[3] SPI SCK | Shield, Shield(2), and EDBG SPI |
19 [GND] | - | - | Ground. |
20 [VCC] | - | - | Power for extension board. |