31.5.1 Control A
| Name: | CTRLA |
| Offset: | 0x00 |
| Reset: | 0x00 |
| Property: | - |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| RUNSTDBY | OUTEN | ENABLE | |||||||
| Access | R/W | R/W | R/W | ||||||
| Reset | 0 | 0 | 0 |
Bit 7 – RUNSTDBY Run in Standby Mode
If this bit is written to ‘1’, the DAC or output
buffer will not automatically be disabled when the device is entering Standby
sleep mode.
Bit 6 – OUTEN Output Buffer Enable
1’ to this bit enables the output buffer and sends the OUT
signal to a pin.Bit 0 – ENABLE DAC Enable
1’ to this bit enables the DAC.