10.1 Overview
ATmega328PB has two SPI peripherals. When SPI enable—SPE bit of SPI control register n—SPICRn is set, the SPI multiplexing I/O pins will be altered to SPI function, and the data direction of the MOSI, MISO, SCK, SS pins is overridden as shown in the table below. For the "User Defined" pin in the table, the users need to configure it to output direction; if the pin is forced by the SPI module to be an input, the pull-up can still be controlled by the port registers.
Pin | Direction, Master SPI | Direction, Slave SPI |
---|---|---|
MOSI | User defined | Input |
MISO | Input | User defined |
SCK | User defined | Input |
SS | User defined | Input |