5.1 Input Capture Pin--ICPn Configuration

The Input Capture Register can capture the Timer/Counter value when a change of the logic level (an event) occurs on either the Input Capture pin (ICPn) or alternatively on the Analog Comparator output (ACO). To select the ICPn pin, the ACSR.ACIC should first be cleared to disable the Analog Comparator input capture function. Secondly, the users need to set the WGM[3:0] value for choosing the Timer/counter operation mode not using the ICRn register as Timer/counter TOP value. For more information about WGM[3:0] setting, see the table below.

Bit 2 – ACIC: Analog Comparator Input Capture Enable

When written logic one, this bit enables the input capture function in Timer/Counter to be triggered by the Analog Comparator; When written logic zero, no connection between the Analog Comparator and the input capture function exists.