7.1 System Arbitration
The system arbiter resolves memory access between the system level
selections (i.e., Main, Interrupt Service Routine) and peripheral selection (e.g., DMA
and Scanner) based on user-assigned priorities. A block diagram of the system arbiter
can be found below. Each of the system level and peripheral selections has its own
priority selection registers. Memory access priority is resolved using the number
written to the corresponding Priority registers, 0
being the highest
priority selection and the maximum value being the lowest priority. All system level and
peripheral level selections default to the lowest priority configuration. If the same
value is in two or more Priority registers, priority is given to the higher-listed
selection according to the following table.
Selection | Priority Register Reset Value | |
---|---|---|
System Level | ISR | 7 |
MAIN | 7 | |
Peripheral | DMA1 | 7 |
DMA2 | 7 | |
DMA3 | 7 | |
DMA4 | 7 | |
SCANNER | 7 |