6.1 Solar Charging Start-Up Process

The typical challenge with a buck converter is that the high-side gate driver receives its power from the bootstrap capacitor when the sync-trace is low. When starting a pre-biased output buck converter, this capacitor is charged through the boost diode by pulling the low-side MOSFET down. This can cause the inductor to wind up in the opposite direction from normal, which causes the converter to run backward by pulling current from the output battery through the inductor to ground. This reverse operation results in the inductor boosting the battery voltage through the high-side body diode, then up to the solar input side of the supply. To prevent this action, the start-up process pulses the low-side MOSFET long enough to allow the high-side boost cap to charge up.

When Start is clicked in the GUI, or when the panel voltage rises enough to initiate charging, the converter needs to first determine what voltage to attempt to start the converter. If the set point DAC is set too high, the converter duty cycle will be too low to deliver power, and the bootstrap capacitor will run out of charge. Starting the DAC at too low of a value will generate long duty cycles immediately, which could overdrive the output and may crash the input voltage or over-voltage the battery (if nearly fully charged). To overcome these challenges, there is a routine that will scan the DAC-5 set point, looking for the value that first causes the COMP-5 to change state. This value (adjusted slightly down) is used as the starting value to get the converter to start running at low power. There is also a soft-start routine that ramps up the maximum duty cycle and allows the outer-loop software routines to adjust the DAC-5 set point as needed.

When the DAC-5 value is found, the converter is then started in Nonsynchronous mode with the low-side MOSFET left inactive, and the off-state current commutates through the low-side Schottky diode in parallel with the low-side MOSFET. When the current rises above a threshold, as detected by the IBAT ADC monitor, the firmware will switch to Synchronous mode by enabling the low-side FET using the 'enable_sync_mode()' function. Similarly, when the power is reduced, this same threshold concept is used to disable the low-side MOSFET with the 'disable_sync_mode()' function. Low-power designs can forgo the low-side power MOSFET, but for boot-up purposes, there may need to be a low-power MOSFET there in order to pull the SYNC node low to charge the bootstrap capacitor.