Register Descriptions

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This section describes registers of the L2 cache controller. For more information, see PolarFire SoC Device Register Map.

Cache Configuration Register (Config)
Way Enable Register (WayEnable)
ECC Error Injection Register (ECCInjectError)
ECC Directory Fix Address (ECCDirFixAddr)
ECC Directory Fix Count (ECCDirFixCount)
ECC Directory Fail Address (ECCDirFailAddr)
ECC Directory Fail Count (ECCDirFailCount)
ECC Data Fix Address (ECCDataFixAddr)
ECC Data Fix Count (ECCDataFixCount)
ECC Data Fail Address (ECCDataFailAddr)
ECC Data Fail Count (ECCDataFailCount)
Cache Flush Registers
Way Mask Registers (WayMaskX)

Parent topic: L2 Cache Controller