Logic AND Gate Code Example
#include <avr/io.h>
void PORT_init (void);
void CCL_init(void);
void PORT_init (void)
{
PORTC.DIR &= ~PIN0_bm;
PORTC.DIR &= ~PIN1_bm;
PORTC.DIR &= ~PIN2_bm;
PORTC.DIR |= PIN3_bm;
}
void CCL_init(void)
{
CCL.LUT1CTRLB = CCL_INSEL0_IO_gc
| CCL_INSEL1_IO_gc;
CCL.LUT1CTRLC = CCL_INSEL2_IO_gc;
CCL.TRUTH1 = 0x80;
CCL.LUT1CTRLA = CCL_OUTEN_bm;
CCL.LUT1CTRLA |= CCL_ENABLE_bm;
CCL.CTRLA = CCL_ENABLE_bm;
}
int main(void)
{
PORT_init();
CCL_init();
while (1)
{
;
}
}
State Decoder Code Example
#include <avr/io.h>
void PORT_init (void);
void CCL_init(void);
void PORT_init (void)
{
PORTA.DIR &= ~PIN0_bm;
PORTA.DIR &= ~PIN1_bm;
PORTC.DIR &= ~PIN0_bm;
PORTC.DIR &= ~PIN1_bm;
PORTC.DIR &= ~PIN2_bm;
PORTA.DIR |= PIN3_bm;
}
void CCL_init(void)
{
CCL.LUT0CTRLB = CCL_INSEL0_IO_gc
| CCL_INSEL1_IO_gc;
CCL.LUT0CTRLC = CCL_INSEL2_LINK_gc;
CCL.LUT1CTRLB = CCL_INSEL0_IO_gc
| CCL_INSEL1_IO_gc;
CCL.LUT1CTRLC = CCL_INSEL2_IO_gc;
CCL.TRUTH0 = 0x40;
CCL.TRUTH1 = 0x20;
CCL.LUT0CTRLA = CCL_OUTEN_bm;
CCL.LUT0CTRLA |= CCL_ENABLE_bm;
CCL.LUT1CTRLA = CCL_ENABLE_bm;
CCL.CTRLA = CCL_ENABLE_bm;
}
int main(void)
{
PORT_init();
CCL_init();
while (1)
{
;
}
}
SR Latch Code Example
#include <avr/io.h>
void PORT_init (void);
void CCL_init(void);
void PORT_init (void)
{
PORTA.DIR &= ~PIN1_bm;
PORTC.DIR &= ~PIN1_bm;
PORTA.DIR |= PIN3_bm;
}
void CCL_init(void)
{
CCL.LUT0CTRLB = CCL_INSEL0_MASK_gc
| CCL_INSEL1_IO_gc;
CCL.LUT0CTRLC = CCL_INSEL2_MASK_gc;
CCL.LUT1CTRLB = CCL_INSEL0_MASK_gc
| CCL_INSEL1_IO_gc;
CCL.LUT1CTRLC = CCL_INSEL2_MASK_gc;
CCL.TRUTH0 = 0x01;
CCL.TRUTH1 = 0x01;
CCL.LUT0CTRLA = CCL_FILTSEL_FILTER_gc;
CCL.LUT1CTRLA = CCL_FILTSEL_FILTER_gc;
CCL.SEQCTRL0 = CCL_SEQSEL0_RS_gc;
CCL.LUT0CTRLA |= CCL_OUTEN_bm;
CCL.LUT0CTRLA |= CCL_ENABLE_bm;
CCL.LUT1CTRLA |= CCL_ENABLE_bm;
CCL.CTRLA = CCL_ENABLE_bm;
}
int main(void)
{
PORT_init();
CCL_init();
while (1)
{
;
}
}