46.9 Register Summary

Note: Offsets 0x100–0x128 are reserved for PDC registers.
OffsetNameBit Pos.76543210
0x00SSC_CR31:24        
23:16        
15:8SWRST     TXDISTXEN
7:0      RXDISRXEN
0x04SSC_CMR31:24        
23:16        
15:8    DIV[11:8]
7:0DIV[7:0]

0x08

...

0x0F

Reserved         
0x10SSC_RCMR31:24PERIOD[7:0]
23:16STTDLY[7:0]
15:8   STOPSTART[3:0]
7:0CKG[1:0]CKICKO[2:0]CKS[1:0]
0x14SSC_RFMR31:24FSLEN_EXT[3:0]   FSEDGE
23:16 FSOS[2:0]FSLEN[3:0]
15:8    DATNB[3:0]
7:0MSBF LOOPDATLEN[4:0]
0x18SSC_TCMR31:24PERIOD[7:0]
23:16STTDLY[7:0]
15:8    START[3:0]
7:0CKG[1:0]CKICKO[2:0]CKS[1:0]
0x1CSSC_TFMR31:24FSLEN_EXT[3:0]   FSEDGE
23:16FSDENFSOS[2:0]FSLEN[3:0]
15:8    DATNB[3:0]
7:0MSBF DATDEFDATLEN[4:0]
0x20SSC_RHFR31:24RDAT[31:24]
23:16RDAT[23:16]
15:8RDAT[15:8]
7:0RDAT[7:0]
0x24SSC_THFR31:24TDAT[31:24]
23:16TDAT[23:16]
15:8TDAT[15:8]
7:0TDAT[7:0]
0x28SSC_FFMR31:24        
23:16       RXFIFODIS
15:8    THRS[3:0]
7:0       TXFIFODIS

0x2C

...

0x2F

Reserved         
0x30SSC_RSHR31:24        
23:16        
15:8RSDAT[15:8]
7:0RSDAT[7:0]
0x34SSC_TSHR31:24        
23:16        
15:8TSDAT[15:8]
7:0TSDAT[7:0]
0x38SSC_RC0R31:24        
23:16        
15:8CP0[15:8]
7:0CP0[7:0]
0x3CSSC_RC1R31:24        
23:16        
15:8CP1[15:8]
7:0CP1[7:0]
0x40SSC_SR31:24RXURWCNT[3:0]TXFRECNT[3:0]
23:16      RXENTXEN
15:8    RXSYNTXSYNCP1CP0
7:0  OVRUNRXRDY  TXEMPTYTXRDY
0x44SSC_IER31:24        
23:16        
15:8    RXSYNTXSYNCP1CP0
7:0  OVRUNRXRDY  TXEMPTYTXRDY
0x48SSC_IDR31:24        
23:16        
15:8    RXSYNTXSYNCP1CP0
7:0  OVRUNRXRDY  TXEMPTYTXRDY
0x4CSSC_IMR31:24        
23:16        
15:8    RXSYNTXSYNCP1CP0
7:0  OVRUNRXRDY  TXEMPTYTXRDY

0x50

...

0xE3

Reserved         
0xE4SSC_WPMR31:24WPKEY[23:16]
23:16WPKEY[15:8]
15:8WPKEY[7:0]
7:0       WPEN
0xE8SSC_WPSR31:24        
23:16WPVSRC[15:8]
15:8WPVSRC[7:0]
7:0       WPVS