39.19 DAC

Table 39-26. DAC Electrical Specifications
Operating Conditions:
  • VREF = 3.0V
Symbol Description Min. Typ. ✝ Max. Unit Conditions
VDD Supply voltage 1.8 — 5.5 V
VOUT Output voltage range 0.1 — VDD - 0.1 V

IOH max. (current sourcing) = 1 mA
IOL max. (current sinking) = 0.001 mA(2)
VLSB Resolution — 10 — Bit
VACC Absolute accuracy -10 1 10 LSb
tST Settling Time(1) — 7 — μs VDACREF = VDD = 3.0V, 50 pF Load
— 10 — μs VDACREF = VDD = 5.5V, 50 pF Load
INL Integral nonlinearity -2.3 1 2.3 LSb 0x030 ≤ DAC.DATA < 0x3D0
DNL Differential nonlinearity -0.7 0.2 0.7 LSb 0x030 ≤ DAC.DATA < 0x3D0
EOFF Offset error -5 2.8 5 LSb
EGAIN Gain error -3.3 -1.1 1.3 LSb

✝ Data found in the “Typ.” column is at TA = 25°C and VDD = 3.0V unless otherwise specified. These parameters are for design guidance only and are not tested.

Note:
  1. Settling time measured while DAC.DATA[9:0] transitions from ‘0x000’ to ‘0x3FF’.
  2. The DAC output has a limited current sinking capability. It is designed to drive against resistive loads connected to ground. It is recommended to increase the sinking capability by placing a suitable resistor between the DAC output pin and ground if the DAC peripheral may sink current.