12.5.6 Main Clock Status

Name: MCLKSTATUS
Offset: 0x05
Reset: 0x00
Property: -

Bit 76543210 
   PLLSEXTSXOSC32KSOSC32KSOSCHFSSOSC 
Access RRRRRR 
Reset 000000 

Bit 5 – PLLS PLL Status

ValueDescription
0 PLL is not running
1 PLL is running

Bit 4 – EXTS External Crystal/Clock Status

ValueDescription
0

The external high-frequency crystal is not stable when the Source Select (SELHF) bit in the External High-Frequency Oscillator Control A (CLKCTRL.XOSCHFCTRLA) register is ‘0’.
The external high-frequency clock is not running when the SELHF bit is ‘1’.

1

The external high-frequency crystal is stable when the SELHF bit is ‘0’.
The external high-frequency clock is running when the SELHF bit is ‘1’.

Bit 3 – XOSC32KS XOSC32K Status

ValueDescription
0

The external 32.768 kHz crystal is not stable when the Source Select (SEL) bit in the 32.768 Crystal Oscillator Control A (CLKCTRL.XOSC32K) register is ‘0’.
The external 32.768 kHz clock is not running when the SEL bit is ‘1’.

1

The external 32.768 kHz crystal is stable when the SEL bit is ‘0’.
The external 32.768 kHz clock is running when the SEL bit is ‘1’.

Bit 2 – OSC32KS OSC32K Status

ValueDescription
0 OSC32K is not stable
1 OSC32K is stable

Bit 1 – OSCHFS Internal High-Frequency Oscillator Status

ValueDescription
0 OSCHF is not stable
1 OSCHF is stable

Bit 0 – SOSC Main Clock Oscillator Changing

ValueDescription
0 The clock source for CLK_MAIN is not undergoing a switch
1 The clock source for CLK_MAIN is undergoing a switch and will change as soon as the new source is stable