3.4.4 MIPI DSI® Display Interface
The MIPI DSI host controller is a digital core that implements all protocol functions defined in the MIPI DSI Specification. The DSI host provides an interface between the LCD Controller (LCDC) and the MIPI D-PHY, allowing communication with a DSI-compliant display.
The display serial Interface (DSI) sends data to a compliant display. A D-PHY configured as a host (TX) acts as the physical layer.
On the SAMA7D65 Curiosity Pro, the MIPI display is connected to the 34-pin FPC connector (J54).
Four headers (J55, J56, J57, J58) are arranged in a rectangular pattern on the PCB layout. These headers act as "pillars" for mounting a standard display onto the board.
|
PIO |
Signal Name |
Signal Description |
|---|---|---|
|
PB18 |
MIPI_IO0_0.MIPI_ENABLE |
Display enable signal |
|
PB16 |
MIPI_IO0_0.MIPI_IRQ |
Display touchscreen interrupt line |
|
PB14 |
MIPI_IO0_0.MIPI_PWM |
Display PWM signal |
|
PC06 |
MIPI_IO0_0.MIPI_TWCK |
Display TWI clock signal |
|
PC07 |
MIPI_IO0_0.MIPI_TWD |
Display TWI data signal |
