1 Configuration Summary
| Device | Flash (KB) | SRAM (KB) / Backup SRAM (KB) | Pins | Packages | I/O Pins (1) | Peripherals | Analog | Safety and Security | ||||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Ethernet Controller | CAN-FD | SERCOM (2,3) | TC / Compare-Capture | TCC (24-bit/16-bit) | I2S | FS USB | QSPI | SDHC | DMA Channels | Parallel Capture Controller (data size) | Position Decoder | RTC / WDT | Event System (Channels) | External Interrupt Lines | ADC (Channels ADC0/ADC1) | Analog Comparators (Channels) | DAC (Channels) | Peripheral Touch Controller | AES | TRNG | Public Key Cryptography (PUKCC) | Integrity Check Monitor | Tamper Pins | Hardware Security Module | Immutable Boot | Boot Read Protection | ||||||
| PIC32CX1025SG41064 | 1024 | 256/8 | 64 | TQFP | 51 | Y | Y | 6 | 6/2 | 2/3 | Y | Y | Y | 1 | 32 | 10 | Y | Y/Y | 32 | 16 | 16/8 | 4 | 2 | Y | Y | Y | Y | Y | 3 | N | Y | Y |
| PIC32CX1025SG41100 | 100 | TQFP | 81 | 8 | 8/2 | 2 | 14 | 16/12 | 5 | N | Y | Y | ||||||||||||||||||||
| PIC32CX1025SG41128 | 128 | 99 | 16/16 | |||||||||||||||||||||||||||||
| PIC32CX1025SG60100 | 100 | TQFP / TFBGA | 81 | 16/12 | Y | N | N | |||||||||||||||||||||||||
| PIC32CX1025SG60128 | 128 | TQFP | 94 | 16/16 | ||||||||||||||||||||||||||||
| PIC32CX1025SG61100 | 100 | TQFP / TFBGA | 81 | 16/12 | Y | Y | ||||||||||||||||||||||||||
| PIC32CX1025SG61128 | 128 | TQFP | 94 | 16/16 | ||||||||||||||||||||||||||||
Note:
- Five I/Os (PB26, PB27, PB28, PB29 and PC04) are not connected as reserved for the HSM interconnection (PIC32CX SG60/SG61 only).
- SERCOM2 is assigned to the HSM interconnection (PIC32CX SG60/SG61 only).
- I2C is not supported on all SERCOM pins. Refer to the Chapter “SERCOM I2C Configuration “ for a list of supported features for each peripheral instance.