7.6 Error Codes
In the case of an internal error, the SYS_ERR event flag in the event byte events.system is set and an error code is stored to the SRAM variable debug:
| Address | Name | Bit 7 | Bit 6 | Bit 5 | Bit 4 | Bit 3 | Bit 2 | Bit 1 | Bit 0 |
|---|---|---|---|---|---|---|---|---|---|
| 0x0300 | errorCode | Contains the error information of the last system error | |||||||
| 0x0301 | ssmErrorCode | Contains the last internal state of the hardware SSM | |||||||
| errorCode | Error Description |
|---|---|
| 0 |
DEBUG_ERROR_CODE_SYSTEM_ERROR_EEPROM_NOT_VALID This error code is set if the EEPROM content is not valid. If this error occurs, the SW stays in an endless loop. SPI communication is still possible. |
| 1 |
DEBUG_ERROR_CODE_SETIDLEMODE_MISS_SSMRDY This error code is set if the ShutDown SSM does not signal SSM_RDY. |
| 2 |
DEBUG_ERROR_CODE_SETIDLEMODE_TIMER_LOCKED This error code is set if the SSM watchdog timer (Timer2) is not available for ShutDown. |
| 3 |
DEBUG_ERROR_CODE_RX_STATESTARTSSM_TIMER_LOCKED This error code is set if the SSM watchdog timer (Timer2) is not available for RX. |
| 4 |
DEBUG_ERROR_CODE_RX_STATEWAIT4SSMSTATE_GETTELEGRAM_TIMEOUT This error code is set if the GET_TELEGRAM SSM is not started at the right time. If this error occurs, the system is switched to IDLEMode via ShutDown SSM. |
| — | — |
| — | — |
| 7 | Reserved |
| 8 |
DEBUG_ERROR_CODE_POLL_STATEWAIT4SSMSTATE_GETTELEGRAM_TIMEOUT This error code is set if the GET_TELEGRAM is not started at the right time. If this error occurs, the system is switched to IDLEMode via ShutDown SSM. |
| — | — |
| — | — |
| 11 |
DEBUG_ERROR_CODE_VCOCAL_STATESTARTSSM_TIMER_LOCKED This error code is set if the SSM watchdog timer (Timer2) is not available for VCO tuning. |
| 12 |
DEBUG_ERROR_CODE_VCOCAL_STATEWAIT4SSMRDY_TIMEOUT This error code is set if the VCO tuning SSM is not finished at the right time. If this error occurs, the system is switched to IDLEMode via ShutDown SSM. |
| 13 |
DEBUG_ERROR_CODE_SHUTDOWNTRX_TIMER_LOCKED This error code is set if the SSM watchdog timer (Timer2) is not available for ShutDown SSM. |
| 14 |
DEBUG_ERROR_CODE_SHUTDOWNTRX_TIMEOUT This error code is set if the ShutDown SSM is not finished at the right time. |
| 15 |
DEBUG_ERROR_CODE_POLLING_TIMER1_LOCKED This error code is set if the polling timer (Timer1) is not available for polling. |
| 16 |
DEBUG_ERROR_CODE_INVALID_OPM_SWITCHING This error code is set if the OPM switching is not allowed. |
| 17 |
DEBUG_ERROR_CODE_INVALID_OPM_MODE_DURING_TUNE_AND_CHECK This error code is set if TuneAndCheck is requested via SPI and the system is not in IDLEMode. |
| — | — |
| 19 |
DEBUG_ERROR_CODE_SERVICE_INIT_FAILURE This error code is set if the SRAM service initialization contains the wrong parameters. |
| 20 |
DEBUG_ERROR_CODE_DFIFO_OVER_UNDER_FLOW This error code is set if a DFIFO overflow/underflow is detected. The corresponding interrupt is disabled to avoid continuous overflow/underflow interrupts. |
| 21 |
DEBUG_ERROR_CODE_SFIFO_OVER_UNDER_FLOW This error code is set if a SFIFO overflow/underflow is detected. The corresponding interrupt is disabled to avoid continuous overflow/underflow interrupts. |
| 22 |
DEBUG_ERROR_CODE_RSSI_STATESTARTSSM_TIMER_LOCKED This error code is set if the SSM watchdog timer (Timer2) is not available for RSSI measurement. |
| 23 |
DEBUG_ERROR_CODE_SRC_FRC_CALIB_FAILED This error code is set if Timer2 and Timer3 are no available for SRC/FRC calibration. |
| 24 |
DEBUG_ERROR_CODE_GETRXTELEGRAM_SSM_ERROR This error code is set if GetRxTelegram SSM returns with error code and SSM_RDY. |
| 25 |
DEBUG_ERROR_CODE_TEMPMEAS_STATESTARTSSM_TIMER_LOCKED This error code is set if the SSM watchdog timer (Timer2) is not available for temperature measurement. |
| 26 |
DEBUG_ERROR_CODE_TEMPMEAS_STATEWAIT4SSMRDY_TIMEOUT This error code is set if the temperature measurement SSM is not finished at the right time. |
| 27 |
DEBUG_ERROR_CODE_AVCCLOW_TIMEOUT This error code is set if AVCC is not enabled at the right time (180 µs). |
| 28 |
DEBUG_ERROR_CODE_SUBCHAN_STATESTARTSSM_CENTERFREQ_TIMER_LOCKED This error code is set if the SSM watchdog timer (Timer2) is not available for sub-channeling on center frequency. |
| 29 |
DEBUG_ERROR_CODE_SUBCHAN_STATESTARTSSM_LOWERFREQ_TIMER_LOCKED This error code is set if the SSM watchdog timer (Timer2) is not available for sub-channeling on lower frequency. |
| 30 |
DEBUG_ERROR_CODE_SUBCHAN_STATESTARTSSM_UPPERFREQ_TIMER_LOCKED This error code is set if the SSM watchdog timer (Timer2) is not available for sub-channeling on upper frequency. |
| 31 |
DEBUG_ERROR_CODE_SUBCHAN_STATESTARTSSM_CENTERFREQ_TIMEOUT This error code is set if the SSM, used for sub-channeling on center frequency, is not finished at the right time. |
| 32 |
DEBUG_ERROR_CODE_SUBCHAN_STATESTARTSSM_LOWERFREQ_TIMEOUT This error code is set if the SSM, used for sub-channeling on lower frequency, is not finished at the right time. |
| 33 |
DEBUG_ERROR_CODE_SUBCHAN_STATESTARTSSM_UPPERFREQ_TIMEOUT This error code is set if the SSM, used for sub-channeling on upper frequency, is not finished at the right time. |
| ssmErrorCode | Error Description |
|---|---|
| 0x81 | This error code is set if an error occurs in SSM “PLL enable” |
| 0x82 | This error code is set if an error occurs in SSM “PLL lock” |
| 0x83 | This error code is set if an error occurs in SSM “RX DSP enable” |
| 0x84 | This error code is set if an error occurs in SSM “RX DSP disable” |
| 0x85 | — |
| 0x86 | — |
| 0x87 | — |
| 0x88 | — |
| 0x89 | This error code is set if an error occurs in SSM “Get telegram” |
| 0x8A | — |
| 0x8B | This error code is set if an error occurs in SSM “Shut down” |
| 0x8C | This error code is set if an error occurs in SSM “VCO-Tuning” |
| 0x8D | — |