32.4.3 I/O and CLKOUT Timing Specifications

Figure 32-6. CLKOUT and I/O Timing

Table 32-11.
Standard Operating Conditions (unless otherwise stated)
Param No.	Sym.	Characteristic	Min.	Typ. †	Max.	Units	Conditions
IO1*	T_CLKOUTH	CLKOUT rising edge delay (rising edge F_OSC (Q1 cycle) to falling edge CLKOUT	—	—	70	ns
IO2*	T_CLKOUTL	CLKOUT falling edge delay (rising edge F_OSC (Q3 cycle) to rising edge CLKOUT	—	—	72	ns
IO3*	T_{IO_VALID}	Port output valid time (rising edge F_OSC (Q1 cycle) to port valid)	—	50	70	ns
IO4*	T_{IO_SETUP}	Port input setup time (Setup time before rising edge F_OSC – Q2 cycle)	20	—	—	ns
IO5*	T_{IO_HOLD}	Port input hold time (Hold time after rising edge F_OSC – Q2 cycle)	50	—	—	ns
IO6*	T_{IOR_SLREN}	Port I/O rise time, slew rate enabled	—	25	—	ns	V_DD = 3.0V
IO7*	T_{IOR_SLRDIS}	Port I/O rise time, slew rate disabled	—	5	—	ns	V_DD = 3.0V
IO8*	T_{IOF_SLREN}	Port I/O fall time, slew rate enabled	—	25	—	ns	V_DD = 3.0V
IO9*	T_{IOF_SLRDIS}	Port I/O fall time, slew rate disabled	—	5	—	ns	V_DD = 3.0V
IO10*	T_INT	INT pin high or low time to trigger an interrupt	25	—	—	ns
IO11*	T_IOC	Interrupt-on-change minimum high or low time to trigger interrupt	25	—	—	ns
* - These parameters are characterized but not tested.

PIC16F15256/74/75/76