32.3.4 I/O Ports

Table 32-6. 
Standard Operating Conditions (unless otherwise stated)
Param. No.Sym.Device CharacteristicsMin.Typ.†Max.UnitsConditions
Input Low Voltage
VILI/O PORT:
D300
  • with TTL buffer
0.8V4.5V ≤ VDD ≤ 5.5V
D3010.15 VDD V1.8V ≤ VDD ≤ 4.5V
D302
  • with Schmitt Trigger buffer
0.2 VDDV1.8V ≤ VDD ≤ 5.5V
D303
  • with I2C levels
0.3 VDDV2.0 ≤ VDD ≤ 5.5V
D304
  • with SMBus levels
0.8V2.7V ≤ VDD ≤ 5.5V
D305MCLR0.2 VDDV
Input High Voltage
VIHI/O PORT:
D320
  • with TTL buffer
2.0V4.5V ≤ VDD ≤ 5.5V
D3210.25 VDD + 0.8V1.8V ≤ VDD ≤ 4.5V
D322
  • with Schmitt Trigger buffer
0.8VDDV1.8V ≤ VDD ≤ 5.5V
D323
  • with I2C levels
0.7 VDDV
D324
  • with SMBus levels
2.1V2.7V ≤ VDD ≤ 5.5V
D325MCLR0.8 VDDV
Input Leakage Current(1)
D340IILI/O PORTS±5±125nAVSS ≤ VPIN ≤ VDD,

Pin at high-impedance, 85°C

D341±5±1000nAVSS ≤ VPIN ≤ VDD,

Pin at high-impedance, 125°C

D342MCLR(2)±50±200nAVSS ≤ VPIN ≤ VDD,

Pin at high-impedance, 85°C

Weak Pull-up Current
D350IPUR25120200μAVDD = 3.0V, VPIN = VSS
Output Low Voltage
D360VOLStandard I/O PORTS0.6VIOL = 10 mA, VDD = 3.0V
Output High Voltage
D370VOHStandard I/O PORTSVDD - 0.7VIOH = 6 mA, VDD = 3.0V
All I/O Pins
D380CIO550pF

† - Data in ‘Typ’ column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested.

Note:
  1. Negative current is defined as current sourced by the pin.
  2. The leakage current on the MCLR pin is strongly dependent on the applied voltage level. The specified levels represent normal operating conditions. Higher leakage current may be measured at different input voltages.