The RCxIF Interrupt Flag bit will be set when a character is
transferred from the RSR to the receive buffer. An interrupt will be generated if the
RCxIE interrupt enable bit was also set.
Read the RCxSTA register to get the Error flags and, if 9-bit data
reception is enabled, the ninth data bit.
Get the received eight Least Significant data bits from the
receive buffer by reading the RCxREG register.
If an overrun occurred, clear the OERR flag by clearing the CREN receiver enable bit.
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