11.3.2.3 Command Modes

Reading the memory arrays is handled using the LD*/LPM(1) instructions.

The erase of the whole Flash (CHER) or the EEPROM (EECHER) is started by writing commands to the NVMCTRL.CTRLA register. The other write/erase operations are just enabled by writing commands to the NVMCTRL.CTRLA register and must be followed by writes using ST*/SPM(1) instructions to the memory arrays.
Note:
  1. LPM/SPM cannot be used for EEPROM.
To write a command in the NVMCTRL.CTRLA register, the following sequence needs to be executed:
  1. Confirm that any previous operation is completed by reading the Busy (EEBUSY and FBUSY) flags in the NVMCTRL.STATUS register.
  2. Write the appropriate key to the Configuration Change Protection (CPU.CCP) register to unlock the NVM Control A (NVMCTRL.CTRLA) register.
  3. Write the desired command value to the CMD bit field in the Control A (NVMCTRL.CTRLA) register within the next four instructions.
The following steps are required to perform a write/erase operation in the NVM:
  1. Confirm that any previous operation is completed by reading the Busy (EEBUSY and FBUSY) flags in the NVMCTRL.STATUS register.
  2. Optional: If accessing the Flash in the CPU data space, map the corresponding 32 KB Flash section into the data space by writing the FLMAP bit field in the NVMCTRL.CTRLB register.
  3. Write the desired command value to the NVMCTRL.CTRLA register as described before.
  4. Write to the correct address in the data space/code space using the ST*/SPM instructions.
  5. Optional: If multiple write operations are required, go to step 4.
  6. Write a NOOP or NOCMD command to the NVMCTRL.CTRLA register to clear the current command.