3.2 Variable Transfer Size Mode (BMODE = 1)

In this mode, SPIxTCTH<2:0> and SPIxTCTL are combined to form an 11-bit transfer counter that specifies the number of data transfers that are to occur. When BMODE = 1, the SPIxTWIDTH register signifies the width of the data packets that will be transferred by the SPI master. Every time a data transfer occurs, the 11-bit transfer counter will decrement by the width of the packet, which is dependent on the configuration of the SPIxTWIDTH register. When the SPI master is configured in Transmit-Only mode, the transfer counter will decrement with each packet being transferred, however, it will not cease communication once the transfer counter has reached zero.