6.37.2 Status Register (SREG) and Boolean Formula

ITHSVNZC
0
I

0

Global Interrupt Enable bit cleared.

Example:

      in    temp, SREG   ; Store SREG value (temp must be defined by user)
      cli                ; Disable interrupts during timed sequence
      sbi   EECR, EEMWE  ; Start EEPROM write
      sbi   EECR, EEWE
      out   SREG, temp   ; Restore SREG value (I-flag)
Words
1 (2 bytes)
Table 6-37. Cycles
NameCycles
AVRe1
AVRxm1
AVRxt1
AVRrc1