6.37.1 Description
Clears the Global Interrupt Enable (I) bit in SREG (Status Register). The interrupts will be immediately disabled. No interrupt will be executed after the CLI instruction, even if it occurs simultaneously with the CLI instruction. (Equivalent to instruction BCLR 7.)
|
Operation: | |||
|
(i) |
I ← 0 | ||
|
Syntax: |
Operands: |
Program Counter: | |
|
(i) |
CLI |
None |
PC ← PC + 1 |
16-bit Opcode:
| 1001 | 0100 | 1111 | 1000 |