1.9 In-Band Interrupt (IBI)

Before an IBI can be requested, the bus available time must be configured using the I3CxBAVL register to meet the minimum 1 µs specification. The module can perform an IBI request when IBI is enabled on the bus by the controller (IBIEN = 1). The Target is operating in I3C SDR mode (OPMD = 0b01).

An IBI can be requested by setting the IBIREQ bit, after which the Target sends its Dynamic Address in read mode on the bus for arbitration after either one of the following conditions happens on the bus:

• Bus Available condition is detected on the bus, after which the Target issues a Start by pulling SDA low and participates in address arbitration (Standard IBI)
• Another device issues a Start on the bus before the Bus Available condition is detected, after which the Target participates in address arbitration as well (Passive IBI)

If the Target device wins arbitration and the controller ACKs, the IBI Mandatory Data Byte is transmitted on the bus from the I3CxIBIMDB register, followed by any payload data available in the Transmit FIFO. Just like a Private Read, the Target ends the transaction by pulling the End-of-Data T-bit low when the Transmit FIFO becomes empty, or the controller can abort the transaction by pulling the End-of-Data T-bit low (a Restart condition), in which case the Abort Error ABEIF flag is set. The Transaction Complete TCOMPIF flag is set when either of these conditions happens.

If the Target device loses arbitration or the controller NACKs, the Target attempts to request an IBI again, automatically, until the Arbitration Request Limit in the I3CxRETRY register has been reached, following which the IBI Error IBIEIF flag is set.