Figure 51-99. Input Hysteresis vs
Common-Mode Voltage (VDD = 2.0V)
Figure 51-100. Input Hysteresis vs
Common-Mode Voltage (VDD = 3.0V)
Figure 51-101. Input Hysteresis vs Common-Mode Voltage (VDD =
5.5V)
Figure 51-102. Input Offset vs Common-Mode Voltage (VDD = 2.0V)
Figure 51-103. Input Offset vs
Common-Mode Voltage (VDD = 3.0V)
Figure 51-104. Input Offset vs
Common-Mode Voltage (VDD = 5.5V)
Figure 51-105. Rising Edge Response
Time vs VDD (CxSP[1:0] = 'b00)
Figure 51-106. Rising Edge Response
Time vs VDD (CxSP[1:0] = 'b01)
Figure 51-107. Rising Edge Response
Time vs VDD (CxSP[1:0] = 'b10)
Figure 51-108. Rising Edge Response
Time vs VDD (CxSP[1:0] = 'b11)
Figure 51-109. Falling Edge Response
Time vs VDD (CxSP[1:0] = 'b00)
Figure 51-110. Falling Edge Response
Time vs VDD (CxSP[1:0] = 'b01)
Figure 51-111. Falling Edge Response
Time vs VDD (CxSP[1:0] = 'b10)
Figure 51-112. Falling Edge Response
Time vs VDD (CxSP[1:0] = 'b11)
DS40002671B
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