1.8 Conversion Speed

The ADC clock is derived from a prescaled version of the AVR XMEGA peripheral clock, where the available factors are 1/4, 1/8, 1/16, 1/32, 1/64, 1/128, 1/256, and 1/512. The ADC clock has to be set within the minimum and maximum recommended speed for the ADC module to guarantee correct operation. The ADC Clock is configured using the Clock Prescaler register (PRESCALER).

Having a fast ADC clock gives a short propagation time for each sample, but does not mean that you cannot sample a signal at a much slower rate. For instance, an application could sample at a rate of 10kHz even if the ADC clock is 2 MHz. However, it is not possible to sample at a rate higher than one fourth of the system clock speed since the maximum ADC clock is 1/4^th of the peripheral clock. For XMEGA A devices the ADC clock should not be set higher than 2 MHz, for XMEGA D devices the top frequency limit is 1.4 MHz. Lowest ADC clock frequency for both XMEGA A and XMEGA D devices are 100 kHz. See the device data sheet for more information.

The conversion rate must satisfy the requirements for the given source impedance. If the sampling rate is too high compared to the source impedance, the results will not be accurate. It is important that you do not sample faster than the inclination rate of the signal to follow. The maximum sample rate is defined by the formula:

$f_{ADC}=\frac{1}{2.(R_{source}+R_{channel}).C_{sample}.\ln \left(2^{n+1}\right)}$

The values for C_SAMPLE and R_CHANNEL (R_CHANNEL = R_CHANNEL + R_SWITCH) can be found in the data sheet for the device. The n represent the number of bits in the conversion and can be either 8 or 12. The R_SOURCE is the impedance of the analog signal source, which can be calculated from the circuitry or found in the data sheet of the device if using integrated sensors.

To give an illustration of how this will affect the sampling rate, we will use worst-case numbers for R_CHANNEL, R_SOURCE, and C_SAMPLE. This is 4.5 kΩ for R_CHANNEL+ R_SWITCH and 5 pF for C_SAMPLE. This will give the relationship between source impedance and the maximum sampling rate, as shown in the figure below.