36.5.9 I2CxCLK

I2C Clock Selection Register

Name:	I2CxCLK
Address:	0x029C


Bit	7	6	5	4	3	2	1	0
				CLK[4:0]
Access				R/W	R/W	R/W	R/W	R/W
Reset				0	0	0	0	0

Bits 4:0 – CLK[4:0] I²C Clock Selection

Table 36-4.
CLK	Selection
`11111-11000`	Reserved
`10111`	CLC8_OUT
`10110`	CLC7_OUT
`10101`	CLC6_OUT
`10100`	CLC5_OUT
`10011`	CLC4_OUT
`10010`	CLC3_OUT
`10001`	CLC2_OUT
`10000`	CLC1_OUT
`01111`	SMT1_OUT
`01110-01010`	Reserved
`01001`	TMR6_Postscaler_OUT
`01000`	TMR4_Postscaler_OUT
`00111`	TMR2_Postscaler_OUT
`00110`	TMR0_OUT
`00101`	EXTOSC
`00100`	Clock Reference Output
`00011`	MFINTOSC (500 kHz)
`00010`	HFINTOSC
`00001`	F_OSC (System Clock)
`00000`	F_OSC/4

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