37.13 USART

Figure 37-4. USART in SPI Mode - Timing Requirements in Host Mode

Table 37-18. USART in SPI Host Mode - Timing Specifications
SymbolDescriptionMin.Typ.✝Max.UnitCondition
fSCK *SCK clock frequencyfCLK_PER / 2MHz
TSCK *SCK period2 × TCLK_PERns
tSCKWSCK high/low width0.5 × TSCKns
tMISMISO setup to SCKTCLK_PERns
tMIHMISO hold after SCK0ns
tMOSMOSI setup to SCK0.5 × TSCKns
tMOHMOSI hold after SCK0.5 × TSCKns

Data found in the “Typ.” column is at TA = 25°C and VDD = 3.0V unless otherwise specified. These parameters are not tested and are for design guidance only.

* These parameters are characterized but not tested in production.