37.13 USART

Figure 37-4. USART in SPI Mode - Timing Requirements in Host Mode

Table 37-18. USART in SPI Host Mode - Timing Specifications
SymbolDescriptionMin.Typ.✝Max.UnitCondition
fSCK *SCK clock frequency——fCLK_PER / 2MHz
TSCK *SCK period2 × TCLK_PER——ns
tSCKWSCK high/low width—0.5 × TSCK—ns
tMISMISO setup to SCK—TCLK_PER—ns
tMIHMISO hold after SCK—0—ns
tMOSMOSI setup to SCK—0.5 × TSCK—ns
tMOHMOSI hold after SCK—0.5 × TSCK—ns

✝ Data found in the “Typ.” column is at TA = 25°C and VDD = 3.0V unless otherwise specified. These parameters are not tested and are for design guidance only.

* These parameters are characterized but not tested in production.