5.3 Hardware Triggered Stop

The DMA message transfer can also be stopped using hardware trigger sources. These abort trigger sources can be selected through the Abort Interrupt Request Source register (DMAxAIRQ). Setting the Abort Transfer Interrupt Request Enable bit (AIRQEN) of the DMAxCON0 register enables the selected abort source trigger. Once the trigger is received, the DMA will perform a soft-stop by automatically clearing the DGO bit. The DMA will also clear the SIRQEN and AIRQEN bits. The DMA state information does not change in the event of an abort.