5.2 Soft Stop/Pause

If the user firmware clears the DGO bit, the transfer will halt and the DMA will remain in the current configuration. If the DMA module was in between a byte read and write cycle, the data will be retained in the DMAxBUF register and will not be written to the destination address. The DMA module can be resumed by a Software/Hardware triggered start. The transfer will resume from where it was paused. The user does not need to reconfigure the DMA module before resuming the transfer.