4.2 Diagnostic Mechanisms

This section provides a brief summary of the diagnostic mechanisms considered in the safety analysis. For a detailed description or implementation details for a hardware diagnostic mechanism available in the device, see each device-specific data sheet.

The information is organized in tables. Each table contains information regarding one diagnostic mechanism. The tables have two sections as follows:

  • The first section offers all the information needed by the System Integrator to understand and use the diagnostic mechanism.
  • The second section correlates the diagnostic mechanism to specific items in the ISO 26262-5:2018 and ISO 26262-11:2018 documents.
Table 4-6. Diagnostic Mechanism Information
InformationDescription
PurposeThis is a short explanation of the issue that the diagnostic mechanism is addressing and how the diagnostic mechanism is implemented.
DescriptionThis is additional information that explains implementation details.
Initialization or Setup

Actions needed to ensure that the mechanism, as envisioned, works correctly. Usually this refers to the register or operational mode settings. In case of additional device resources used for the diagnostic mechanism implementation, initialization refers only to these resources.

The initialization of the module used in the application is application-dependent and is a responsibility of the System Integrator. All registers are able to be read during this process. The System Integrator shall determine the number of registers to read and modifications needed after the registers are read.

Error ReportingMechanism used to convey the result of the diagnostic test to the application code, calling the diagnostic routine.
Diagnostic Type

Describes how the test result is obtained. There are two main options:

Software: The test result is obtained with a software operation executed on an attached SoC.

Hardware: The test result is obtained through an involved hardware item inside the device (for example, internal safety mechanism).

Note that there are also two additional sub-options:

  • Software requiring hardware support other than the the device (for example, monitoring the clocks using an asynchronous timer module of the MCU).
  • Hardware requiring software support.
Recovery/Response to Diagnostic ErrorThis is the possible action to be performed to reduce or eliminate the impact of the failure addressed by the diagnostic mechanism.
ProximityLocal Safety Supervisor or Network Safety Supervisor
Periodicity

This describes when the routine should be executed. In general, some of the routines are “destructive” in the sense that they will corrupt the content of the memory and/or registers; other routines are not. Four possible options are considered in this document:

On start-up: This is the case when running the diagnostics corrupts the content of the memory/registers, or the execution time of the diagnostics is too long to be run during normal operation of the device when executing the application code.

On demand: This is not a destructive mechanism. The diagnostics measure is run when a fault is detected.

Periodic: This is not a destructive mechanism. The diagnostic routine is called at specific instants in time based on the application. This option allows the application to run diagnostics that require relevant execution times at reasonable instants that do not impact the behavior and performance of the application.

Continuous: This is not a destructive mechanism. Some diagnostics, by their nature, can be or are run continuously without impacting the application’s behavior or performance.

Note that the tables provide suggestions only. It is the responsibility of the System Integrator to make the final decision regarding the periodicity.

Recommendations and LimitationsThese are notes and information useful for the correct use of the mechanism and correct understanding of its limitations (in use and coverage) as needed.
Relevant Software RequirementsThis details the name of any specific software required by the diagnostic mechanism. All these requirements are also listed in the System-level Software Safety Requirements section.
Relevant Hardware RequirementsThis shows the name assigned to any external hardware (e.g., connections between device pins) needed to implement the diagnostic mechanism. The System-level Hardware Safety Requirements section lists all these items with detailed descriptions.
Reference to ISO 26262:2018 Contents Section
ISO 26262-x TableThis identifies the ISO 26262-5:2018 or ISO 26262-11:2018 table that includes the safety mechanism or measure implemented by the routine. “x” will be either “5” or “11”. Tables D.1 to D.10 can be found in ISO 26262-5:2018, while Tables 32 to 35 can be found in ISO 26262-11:2018.
ISO 26262-x ParagraphThis identifies the ISO 26262-x (“x” will be either “5” or “11”) technique for embedded diagnostic self-tests.
Safety Mechanism MeasureThis reflects the mechanism name as per ISO 26262-5:2018 and ISO 26262-11:2018.
Achievable Diagnostic Coverage

This identifies a percentage of the coverage that can be achieved using the corresponding measure. It has three possible values:

Low = 60%

Medium = 90%

High = 99%

These values are used in the overall FMEDA computations and for determining the ASIL level.

Dataflow Dependency

This highlights if the diagnostic tests operate on ad hoc data or use the data that are normally managed by the application while running. There are two options:

  • Dependent: The tests and their results depend on the data being operated upon the device during the application code execution.
  • Independent: The tests and their results depend on data that are specified by the tests themselves. This is the usual case for diagnostics run on start-up. (See information in the Periodicity row of this table, above.)
Table 4-7. Boot Status Test
InformationDescription
PurposeIndicates whether firmware booted successfully and which firmware (updated, golden, recovery) was booted.
DescriptionProcedure: Using the SPI or I2C interface, the System Integrator should read, after every power-up or reset, the boot_status register.
Initialization or SetupSPI or I2C interface must be enabled in the host processor. Behavior is always enabled in the device.
Error Reporting

The boot_status::status field indicates boot not started, boot in-progress, boot fail, or boot success.

The boot_status::fallback_boot bit indicates if the upgrade firmware image was requested but was not present or could not be booted and instead the golden firmware image was booted.

The boot_status::recovery_boot bit indicates if the device attempted to boot the golden firmware image but it was not present or could not be booted and instead the recovery firmware was booted.

The boot_status::flash_image_type indicates whether golden or upgrade firmware was booted (only valid when recovery_boot is 0).

Diagnostic TypeHardware
Recovery/Response to Diagnostic Error

The System Integrator determines the appropriate action based on system requirements and capabilities.

An initial check should be done by rebooting the device. This is possible in two ways: (1) power cycling or (2) using one of the reset mechanisms in the reset_ctrl register.

ProximityLocal
PeriodicityOn start-up
Recommendations and LimitationsN/A
Relevant Software RequirementsN/A
Relevant Hardware RequirementsN/A
Reference to ISO 26262:2018
ISO 26262-x TableD.5 – Analog and Digital I/O
ISO 26262-x ParagraphD.2.1.1
Safety Mechanism MeasureOnline monitoring
Achievable Diagnostic CoverageLow (60%)
Dataflow DependencyIndependent
Table 4-8. Device Ready Test
InformationDescription
PurposeIndicates whether the device’s internal system APLL and crystal driver (if in use) have been successfully configured and the APLL is locked. Also indicates the device is fully ready and mailbox registers can be read and written. Also indicates device auto-configuration from internal flash is complete.
DescriptionProcedure: Using the SPI or I2C interface, the System Integrator should read, after every power-up or reset, the info and sys_clk_status registers.
Initialization or SetupSPI or I2C interface must be enabled in the host processor. Behavior is always enabled in the device.
Error ReportingThe info::ready bit when 0 indicates the device is not ready. The system_clk_status register has fields that indicate APLL locked or unlocked, APLL config valid or invalid, and system clock state (not started, waiting, in progress, ready).
Diagnostic TypeHardware
Recovery/Response to Diagnostic Error

The System Integrator determines the appropriate action based on system requirements and capabilities.

An initial check should be done by rebooting the device. This is possible in two ways: (1) power cycling or (2) using one of the reset mechanisms in the reset_ctrl register.

ProximityLocal
PeriodicityOn start-up
Recommendations and LimitationsN/A
Relevant Software RequirementsN/A
Relevant Hardware RequirementsN/A
Reference to ISO 26262:2018
ISO 26262-x TableD.5 – Analog and Digital I/O
ISO 26262-x ParagraphD.2.1.1
Safety Mechanism MeasureOnline monitoring
Achievable Diagnostic CoverageLow (60%)
Dataflow DependencyIndependent
Table 4-9. SPI or I2C Read/Write Register Test
InformationDescription
PurposeConfirms proper SPI or I2C communication by testing the read or write commands in a register with no other effects.
Description

This test confirms proper SPI or I2C communication by writing to a register and reading back the value.

Process: Test SPI or I2C functionality by enabling or disabling any output by setting the corresponding output_mode::signal_format register field. Compare write value to read value and also check output responds appropriately.

Initialization or SetupSPI or I2C interface must be enabled in the host processor. Behavior is always enabled in the device.
Error ReportingWhen the value read from a register does not match the value written, an error has occurred.
Diagnostic TypeSoftware
Recovery/Response to Diagnostic Error

The System Integrator determines the appropriate action based on system requirements and capabilities.

An initial check should be done by writing the value 14 decimal to the page_sel register and then reading the page_sel register and comparing the value read to the value written.

ProximityLocal
PeriodicityOn start-up
Recommendations and LimitationsN/A
Relevant Software RequirementsN/A
Relevant Hardware RequirementsN/A
Reference to ISO 26262:2018
ISO 26262-x TableD.6 – Communication bus
ISO 26262-x ParagraphD.2.5.9
Safety Mechanism MeasureReadback of sent message
Achievable Diagnostic CoverageMedium (90%)
Dataflow DependencyIndependent
Table 4-10. SoC Monitoring GPIO Flags
InformationDescription
PurposeTests the functionality of the GPIOs.
Description

Input Process: The error condition is set up for selected GPIO FuSa fault conditions.

Process: Choose the appropriate GPIO functions for test.

In the ready state, set the failure condition.

Validate that the GPIO flag responds to each condition change.

Remove the condition and reset the GPIO flags.

Example:

The GPIO flag should set if the failure mode is APLL loss of lock, and the clock or crystal is disconnected from the OSCI pin while the device is operating.

A second example would be GPIO controlling the output_squelch::en bit if SoC can monitor the output clock.

Initialization or SetupSPI or I2C interface must be enabled in the host processor. Configure the GPIO pin to follow a status bit in the device or to control a control bit in the device.
Error Reporting

For GPIO configured to follow a status bit, if the GPIO pin does not change states then an error has occurred.

For GPIO configured to control a control bit, if the function controlled by the control bit is not affected then an error has occurred. Note that the control bit itself is not affected by the GPIO, only the hardware controlled by the control bit is affected.

Diagnostic TypeHardware
Recovery/Response to Diagnostic ErrorThe System Integrator determines the appropriate action based on system requirements and capabilities.
ProximityLocal
PeriodicityOn demand
Recommendations and LimitationsN/A
Relevant Software RequirementsN/A
Relevant Hardware RequirementsSPI or I2C read/write capability
Reference to ISO 26262:2018
ISO 26262-x TableD.5 – Analog and Digital I/O
ISO 26262-x ParagraphD.2.1.1
Safety Mechanism MeasureOnline Monitoring
Achievable Diagnostic CoverageLow (60%)
Dataflow DependencyIndependent
Table 4-11. APLL Loss of Lock
InformationDescription
PurposeIndicates whether the device’s internal system APLL is locked.
DescriptionProcedure: Using the SPI or I2C interface, the System Integrator should read the sys_clk_status:apll_unlock bit.
Initialization or SetupSPI or I2C interface must be enabled in the host processor. Behavior is always enabled in the device.
Error ReportingThis warning can be accesses by SPI or I2C or by GPIO pin (when GPIO is configured to follow the sys_clk_status:: apll_unlock bit).
Diagnostic TypeHardware
Recovery/Response to Diagnostic Error

The System Integrator determines the appropriate action based on system requirements and capabilities.

An initial check should be done by rebooting the device. This is possible in two ways: (1) power cycling or (2) using one of the reset mechanisms in the reset_ctrl register.

ProximityLocal
PeriodicityContinuous
Recommendations and LimitationsN/A
Relevant Software RequirementsN/A
Relevant Hardware RequirementsN/A
Reference to ISO 26262:2018
ISO 26262-x TableD.8 – Program sequence monitoring/clock
ISO 26262-x ParagraphD.2.7.2
Safety Mechanism MeasureOnline Monitoring
Achievable Diagnostic CoverageMedium (90%)
Dataflow DependencyIndependent
Table 4-12. Reference Clock Monitor
InformationDescription
PurposeIndicates whether a reference signal provided to the device meets the monitoring requirements configured in the device.
DescriptionProcedure: Using the SPI or I2C interface, the System Integrator should read the ref_mon_status_x register (where x is 0P for REF0P, 0N for REF0N, or 1 for REF1).
Initialization or SetupSPI or I2C interface must be enabled in the host processor. Monitoring thresholds must be configured in the device reference mailbox registers such as ref_scm, ref_scm_fine, ref_cfm, ref_gst_disqual, ref_gst_qual, ref_pfm_ctrl, ref_pfm_disqualify, ref_pfm_qualify. Not all part numbers in this family have all of these monitors. See the specific data sheet for details.
Error ReportingThis information can be accessed by SPI or I2C or by GPIO pin (when GPIO is configured to follow a ref_mon_status_x bit).
Diagnostic TypeHardware
Recovery/Response to Diagnostic Error

The System Integrator determines the appropriate action based on system requirements and capabilities.

The device can be configured to automatically react to reference clock failure by (a) DPLL automatically selecting the next highest priority valid reference clock signal, or (b) DPLL automatically transitioning to holdover state.

ProximityLocal
PeriodicityContinuous
Recommendations and LimitationsN/A
Relevant Software RequirementsN/A
Relevant Hardware RequirementsN/A
Reference to ISO 26262:2018
ISO 26262-x TableD.8 – Program sequence monitoring/clock
ISO 26262-x ParagraphD.2.7.2
Safety Mechanism MeasureOnline Monitoring
Achievable Diagnostic CoverageMedium (90%)
Dataflow DependencyIndependent
Table 4-13. DPLL State and Status
InformationDescription
PurposeIndicates the current DPLL state-machine state and other status of the DPLL.
DescriptionProcedure: Using the SPI or I2C interface, the System Integrator should read the dpll_mon_status_x and dpll_state_refsel_status_x registers (where x is DPLL number).
Initialization or SetupSPI or I2C interface must be enabled in the host processor. DPLL mode must be configured in the dpll_mode_refsel_x register. Other DPLL parameters must be configured in dpll_ctrl_x, split_xo_ref, split_xo_mode_ctrl, and DPLL mailbox registers. Not all part numbers in this family have all of these. See the specific data sheet for details.
Error ReportingThis information can be accessed by SPI or I2C or by GPIO pin (when GPIO is configured to follow a DPLL status bit).
Diagnostic TypeHardware
Recovery/Response to Diagnostic Error

The System Integrator determines the appropriate action based on system requirements and capabilities.

The device can be configured to automatically react to several DPLL conditions including loss-of-lock, lock, phase-slope limit hit and frequency limit hit.

ProximityLocal
PeriodicityContinuous
Recommendations and LimitationsN/A
Relevant Software RequirementsN/A
Relevant Hardware RequirementsN/A
Reference to ISO 26262:2018
ISO 26262-x TableD.8 – Program sequence monitoring/clock
ISO 26262-x ParagraphD.2.7.2
Safety Mechanism MeasureOnline Monitoring
Achievable Diagnostic CoverageMedium (90%)
Dataflow DependencyIndependent