2.2 Product Family Members

The product family members covered by this document are listed in the table below.

Table 2-1. Product Famly Members
ProductRef. PinsOutput PinsApplication
ZLA260014audio jitter attenuator
ZLA3027638basic jitter attenuator
ZLA3027708clock generator
ZLA3083138central timing IC
ZLA3085138follower timing IC
ZLA3093138central timing IC with IEEE 1588 PTP software

In general, these devices generate up to eight CMOS output clock signals or up to four differential output clock signals, except ZLA2600 (see below):

  • ZLA30277 generates output clocks from an oscillator wired to the OSCI pin and has no reference input pins.
  • ZLA2600 and ZLA30276 have an oscillator wired to the OSCI pin as the jitter reference, lock an internal Digital PLL (DPLL) to any of three reference clock inputs, perform any-to-any frequency conversion and jitter attenuation, and output low-jitter clock signals that are frequency-locked to the selected reference.
  • ZLA30851 has all ZLA30276 features and adds additional reference clock monitors, the ability to use unused clock outputs as general-purpose outputs (GPO), and the ability to use unused reference inputs as general-purpose inputs (GPI). ZLA30851 also has the ability to lock to and generate ref-sync pairs, embedded pulse per second (ePPS) signals, and embedded sync (eSync) signals. It also adds additional DPLL features and behaviors including fast-locking to ref-sync pairs, ePPS, and eSyncsignals.
  • ZLA30831 has all ZLA30851 features and adds many additional features including lower DPLL bandwidths, the ability to lock to 1 PPS inputs such as from GPS receivers, and the ability to make use of a TCXO or OCXO on one of the REF inputs as the stability reference.
  • ZLA30931 is identical to ZLA30831 except it comes bundled with Microchip’s IEEE 1588 PTP software for timing-over-packet applications.

See each product’s respective data sheet for full details of their specific feature sets and capabilities.