3 Packaging Information

CMOS Package

Figure 3-1. CMOS Package Outline/Enclosure
Table 3-1. Type LCC (CMOS)
Package CodeLength“L”Width “W”Height“H”
03.2mm ±0.2mm2.5mm ±0.2mm1.2mm max.
Table 3-2. CMOS Pin Connections
Pin NumberPin Description
1

Enable/Disable or N/C

Output active = Floating or Voltage Applied

2Ground (Case)
3RF Output
4Supply
Note: Package standard termination finish: Au 12-39 microinches over Nickel 50 microinches minimum.
Important: Overall package thickness tolerance will be increased from ±.007 to ±.015 inches when pads are solder coated.

LVDS Package

Figure 3-2. LVDS Package Outline/Enclosure
Table 3-3. Type LCC (LVDS)
Package CodeLength“L”Width “W”Height“H”
13.2mm ±0.2mm2.5mm ±0.2mm1.2mm max.
Table 3-4. Pin Connections
Pin NumberPin Description
1

Enable/Disable or N/C

Output active = Floating or Voltage Applied

2N/C
3Ground (Case)
4LVDS+
5LVDS-
6Supply
Note: Package standard termination finish: Au 12-39 microinches over Nickel 50 microinches minimum.
Important: Overall package thickness tolerance will be increased from ±.007 to ±.015 inches when pads are solder coated.